.. DO NOT EDIT.
.. THIS FILE WAS AUTOMATICALLY GENERATED BY SPHINX-GALLERY.
.. TO MAKE CHANGES, EDIT THE SOURCE PYTHON FILE:
.. "auto_openfpga_basic/05_fpga_instance_name.py"
.. LINE NUMBERS ARE GIVEN BELOW.

.. only:: html

    .. note::
        :class: sphx-glr-download-link-note

        :ref:`Go to the end <sphx_glr_download_auto_openfpga_basic_05_fpga_instance_name.py>`
        to download the full example code.

.. rst-class:: sphx-glr-example-title

.. _sphx_glr_auto_openfpga_basic_05_fpga_instance_name.py:


================================
FPGA Instance to Layout mapping
================================


**_complete_metrics**

.. literalinclude:: ../../../examples/OpenFPGA_basic/_complete_metrics_dp.txt

.. GENERATED FROM PYTHON SOURCE LINES 13-53

.. code-block:: Python


    import glob
    import logging
    import tempfile

    import spydrnet as sdn
    from spydrnet_physical.util import OpenFPGA, FPGAGridGen

    logger = logging.getLogger("spydrnet_logs")
    sdn.enable_file_logging(LOG_LEVEL="INFO")


    def main():
        proj = "../homogeneous_fabric"
        source_files = glob.glob(f"{proj}/*_Verilog/lb/*.v")
        source_files += glob.glob(f"{proj}/*_Verilog/routing/*.v")
        source_files += glob.glob(f"{proj}/*_Verilog/sub_module/*.v")
        source_files += glob.glob(f"{proj}/*_Verilog/fpga_top.v")

        # Create OpenFPGA object
        fpga = OpenFPGA(grid=(4, 4), verilog_files=source_files)

        fpga_grid = FPGAGridGen(
            design_name="FPGA4x4",
            layout="4x4",
            arch_file=f"{proj}/FPGA44_Task/arch/k6_N10_tileable.xml",
            release_root=None,
        )
        fpga_grid.enumerate_grid()
        fpga.load_grid(fpga_grid)

        with open("_complete_metrics_dp.txt", "w", encoding="UTF-8") as fpw:
            for indx_y in range(10, -1, -1):
                for index_x in range(0, 11):
                    fpw.write(f"{fpga.get_top_instance(index_x, indx_y):10}")
                fpw.write("\n")


    if __name__ == "__main__":
        main()


.. _sphx_glr_download_auto_openfpga_basic_05_fpga_instance_name.py:

.. only:: html

  .. container:: sphx-glr-footer sphx-glr-footer-example

    .. container:: sphx-glr-download sphx-glr-download-jupyter

      :download:`Download Jupyter notebook: 05_fpga_instance_name.ipynb <05_fpga_instance_name.ipynb>`

    .. container:: sphx-glr-download sphx-glr-download-python

      :download:`Download Python source code: 05_fpga_instance_name.py <05_fpga_instance_name.py>`

    .. container:: sphx-glr-download sphx-glr-download-zip

      :download:`Download zipped: 05_fpga_instance_name.zip <05_fpga_instance_name.zip>`


.. only:: html

 .. rst-class:: sphx-glr-signature

    `Gallery generated by Sphinx-Gallery <https://sphinx-gallery.github.io>`_