:orphan:
.. _sec:partitions:
Partition Examples
===================
A collection of examples to introduce the functionality, features, and uses of SpyDrNet.
.. raw:: html
.. thumbnail-parent-div-open
.. raw:: html
.. only:: html
.. image:: /auto_openfpga_tiling/images/thumb/sphx_glr_01_netlist_to_graph_thumb.png
:alt:
:ref:`sphx_glr_auto_openfpga_tiling_01_netlist_to_graph.py`
.. raw:: html
Netlist to graph (networkx)
.. raw:: html
.. only:: html
.. image:: /auto_openfpga_tiling/images/thumb/sphx_glr_02_switch_partition_01_thumb.png
:alt:
:ref:`sphx_glr_auto_openfpga_tiling_02_switch_partition_01.py`
.. raw:: html
Logical/Pre-techmapped Partition Conn Box 01
.. raw:: html
.. only:: html
.. image:: /auto_openfpga_tiling/images/thumb/sphx_glr_03_switch_partition_02_thumb.png
:alt:
:ref:`sphx_glr_auto_openfpga_tiling_03_switch_partition_02.py`
.. raw:: html
Physical/Techmapped Partition Conn Box 02
.. raw:: html
.. only:: html
.. image:: /auto_openfpga_tiling/images/thumb/sphx_glr_04_switch_partition_03_thumb.png
:alt:
:ref:`sphx_glr_auto_openfpga_tiling_04_switch_partition_03.py`
.. raw:: html
Partition Conn Box 02 - Simplified
.. raw:: html
.. only:: html
.. image:: /auto_openfpga_tiling/images/thumb/sphx_glr_05_module_partition_thumb.png
:alt:
:ref:`sphx_glr_auto_openfpga_tiling_05_module_partition.py`
.. raw:: html
Split CBs and SBs across fabric
.. raw:: html
.. only:: html
.. image:: /auto_openfpga_tiling/images/thumb/sphx_glr_06_generic_tiling_part1_thumb.png
:alt:
:ref:`sphx_glr_auto_openfpga_tiling_06_generic_tiling_part1.py`
.. raw:: html
Generic Tiling Part02 - Creating tile
.. raw:: html
.. only:: html
.. image:: /auto_openfpga_tiling/images/thumb/sphx_glr_06_generic_tiling_part2_thumb.png
:alt:
:ref:`sphx_glr_auto_openfpga_tiling_06_generic_tiling_part2.py`
.. raw:: html
Generic Tiling Part02 - Creating tile
.. raw:: html
.. only:: html
.. image:: /auto_openfpga_tiling/images/thumb/sphx_glr_07_FloorplanDesign01_thumb.png
:alt:
:ref:`sphx_glr_auto_openfpga_tiling_07_FloorplanDesign01.py`
.. raw:: html
Floorplanning Classic Tiles
.. raw:: html
.. only:: html
.. image:: /auto_openfpga_tiling/images/thumb/sphx_glr_08_area_optimized_tiles_thumb.png
:alt:
:ref:`sphx_glr_auto_openfpga_tiling_08_area_optimized_tiles.py`
.. raw:: html
Generating and Floorplanning Area-optimized FPGA Tiles
.. raw:: html
.. only:: html
.. image:: /auto_openfpga_tiling/images/thumb/sphx_glr_09_tile03_generation_thumb.png
:alt:
:ref:`sphx_glr_auto_openfpga_tiling_09_tile03_generation.py`
.. raw:: html
Unified routing tile structure
.. raw:: html
.. only:: html
.. image:: /auto_openfpga_tiling/images/thumb/sphx_glr_10_tile02_tiles_thumb.png
:alt:
:ref:`sphx_glr_auto_openfpga_tiling_10_tile02_tiles.py`
.. raw:: html
Tile02 - Area optimized version with higher regularity
.. raw:: html
.. only:: html
.. image:: /auto_openfpga_tiling/images/thumb/sphx_glr_11_memory_bank_protocol_thumb.png
:alt:
:ref:`sphx_glr_auto_openfpga_tiling_11_memory_bank_protocol.py`
.. raw:: html
Implementing memeory bank protocol on Tile02
.. raw:: html
.. only:: html
.. image:: /auto_openfpga_tiling/images/thumb/sphx_glr_12_Hetero_Tile01_thumb.png
:alt:
:ref:`sphx_glr_auto_openfpga_tiling_12_Hetero_Tile01.py`
.. raw:: html
Floorplanning Classic Tiles for hetergeneous design
.. raw:: html
.. only:: html
.. image:: /auto_openfpga_tiling/images/thumb/sphx_glr_13_Hetero_Tile01_render_thumb.png
:alt:
:ref:`sphx_glr_auto_openfpga_tiling_13_Hetero_Tile01_render.py`
.. raw:: html
Floorplanning Classic Tiles for hetergeneous design
.. raw:: html
.. only:: html
.. image:: /auto_openfpga_tiling/images/thumb/sphx_glr_partitioning_experiments_thumb.png
:alt:
:ref:`sphx_glr_auto_openfpga_tiling_partitioning_experiments.py`
.. raw:: html
Partitions Experimentation
.. thumbnail-parent-div-close
.. raw:: html
.. toctree::
:hidden:
/auto_openfpga_tiling/01_netlist_to_graph
/auto_openfpga_tiling/02_switch_partition_01
/auto_openfpga_tiling/03_switch_partition_02
/auto_openfpga_tiling/04_switch_partition_03
/auto_openfpga_tiling/05_module_partition
/auto_openfpga_tiling/06_generic_tiling_part1
/auto_openfpga_tiling/06_generic_tiling_part2
/auto_openfpga_tiling/07_FloorplanDesign01
/auto_openfpga_tiling/08_area_optimized_tiles
/auto_openfpga_tiling/09_tile03_generation
/auto_openfpga_tiling/10_tile02_tiles
/auto_openfpga_tiling/11_memory_bank_protocol
/auto_openfpga_tiling/12_Hetero_Tile01
/auto_openfpga_tiling/13_Hetero_Tile01_render
/auto_openfpga_tiling/partitioning_experiments
.. only:: html
.. container:: sphx-glr-footer sphx-glr-footer-gallery
.. container:: sphx-glr-download sphx-glr-download-python
:download:`Download all examples in Python source code: auto_openfpga_tiling_python.zip `
.. container:: sphx-glr-download sphx-glr-download-jupyter
:download:`Download all examples in Jupyter notebooks: auto_openfpga_tiling_jupyter.zip `
.. only:: html
.. rst-class:: sphx-glr-signature
`Gallery generated by Sphinx-Gallery