.. _sample_verilog_netlist:

Sample verilog netlist
-----------------------


Basic netlist
^^^^^^^^^^^^^^

.. =============================  basic_hierarchy =============================
.. raw:: html

    <div class="sphx-glr-thumbcontainer" tooltip="basic_hierarchy">

.. only:: html

 .. figure:: auto_sample_verilog/basic_hierarchy.svg
     :alt: basic_hierarchy

     :ref:`sample_verilog_basic_hierarchy`

.. raw:: html

    </div>

.. ============================= nested_hierarchy =============================

.. raw:: html

    <div class="sphx-glr-thumbcontainer" tooltip="nested_hierarchy">

.. only:: html

 .. figure:: auto_sample_verilog/nested_hierarchy.svg
     :alt: nested_hierarchy

     :ref:`sample_verilog_nested_hierarchy`

.. raw:: html

    </div>


.. ============================= Clear section =============================

.. raw:: html

    <div class="sphx-glr-clear"></div>


Multi-instantiated design
^^^^^^^^^^^^^^^^^^^^^^^^^^

.. =============================  grid_example =============================
.. raw:: html

    <div class="sphx-glr-thumbcontainer" tooltip="grid_example">

.. only:: html

 .. figure:: auto_sample_verilog/grid_example.svg
     :alt: grid_example

     :ref:`sample_verilog_grid_example`

.. raw:: html

    </div>

.. =============================  square_grid =============================
.. raw:: html

    <div class="sphx-glr-thumbcontainer" tooltip="square_grid">

.. only:: html

 .. figure:: auto_sample_verilog/square_grid.svg
     :alt: square_grid

     :ref:`sample_verilog_square_grid`

.. raw:: html

    </div>

.. ============================= Clear section =============================

.. raw:: html

    <div class="sphx-glr-clear"></div>


Homogeneous FPGA outline
^^^^^^^^^^^^^^^^^^^^^^^^


.. raw:: html

    <div class="sphx-glr-clear"></div>

Heterogeneous FPGA outline
^^^^^^^^^^^^^^^^^^^^^^^^^^



.. raw:: html

    <div class="sphx-glr-clear"></div>